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Redundancy-Reduced MobileNet Acceleration on Reconfigurable Logic for ImageNet Classification.

, , , , , , и . ARC, том 10824 из Lecture Notes in Computer Science, стр. 16-28. Springer, (2018)

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AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers., , , , , , и . CoRR, (2019)Training Deep Neural Networks in Low-Precision with High Accuracy Using FPGAs., , , , и . FPT, стр. 1-9. IEEE, (2019)Redundancy-Reduced MobileNet Acceleration on Reconfigurable Logic for ImageNet Classification., , , , , , и . ARC, том 10824 из Lecture Notes in Computer Science, стр. 16-28. Springer, (2018)Customizing Low-Precision Deep Neural Networks for FPGAs., , , , , и . FPL, стр. 97-100. IEEE Computer Society, (2018)A Block Minifloat Representation for Training Deep Neural Networks., , , , и . ICLR, OpenReview.net, (2021)Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks., , , , и . ICONIP (2), том 10635 из Lecture Notes in Computer Science, стр. 393-404. Springer, (2017)AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers., , , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 115-128 (2020)SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks., , , и . CVPR, стр. 4300-4309. Computer Vision Foundation / IEEE Computer Society, (2018)Long Short-Term Memory for Radio Frequency Spectral Prediction and its Real-Time FPGA Implementation., , , , , , , и . MILCOM, стр. 1-9. IEEE, (2018)Super Efficient Neural Network for Compression Artifacts Reduction and Super Resolution., , , , и . WACV (Workshops), стр. 460-468. IEEE, (2024)