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Detecting NBTI induced failures in SRAM core-cells., , , , , , and . VTS, page 75-80. IEEE Computer Society, (2010)On the Test and Mitigation of Malfunctions in Low-Power SRAMs., , , , , and . J. Electron. Test., 30 (5): 611-627 (2014)Test solution for data retention faults in low-power SRAMs., , , , , , and . DATE, page 442-447. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A statistical simulation method for reliability analysis of SRAM core-cells., , , , , , and . DAC, page 853-856. ACM, (2010)Impact of Resistive-Bridging Defects in SRAM Core-Cell., , , , , , and . DELTA, page 265-269. IEEE Computer Society, (2010)Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures., , , , , , and . DTIS, page 39-44. IEEE, (2013)Analyzing resistive-open defects in SRAM core-cell under the effect of process variability., , , , , , and . ETS, page 1-6. IEEE Computer Society, (2013)Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing., , , , , and . VLSI-SoC, page 403-408. IEEE, (2006)Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling., , , , , , and . DDECS, page 353-358. IEEE Computer Society, (2011)Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives., , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 540-549. Springer, (2005)