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Register allocation by priority-based coloring (with retrospective)

, and . Best of PLDI, page 91-103. ACM, (1984)

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Effective Representation of Aliases and Indirect Memory Operations in SSA Form., , , , and . CC, volume 1060 of Lecture Notes in Computer Science, page 253-267. Springer, (1996)Strength Reduction via SSAPRE., , , , , and . CC, volume 1383 of Lecture Notes in Computer Science, page 144-158. Springer, (1998)A near-optimal instruction scheduler for a tightly constrained, variable instruction set embedded processor., and . CASES, page 9-18. ACM, (2002)Minimizing Register Usage Penalty at Procedure Calls.. PLDI, page 85-94. ACM, (1988)Loop induction variable canonicalization in parallelizing compilers., , and . IEEE PACT, page 228-237. IEEE Computer Society, (1996)Partial redundancy elimination in SSA form., , , , , and . ACM Trans. Program. Lang. Syst., 21 (3): 627-676 (1999)The Priority-Based Coloring Approach to Register Allocation., and . ACM Trans. Program. Lang. Syst., 12 (4): 501-536 (1990)Variable Instruction Set Architecture and Its Compiler Support., , , and . IEEE Trans. Computers, 52 (7): 881-895 (2003)A New Algorithm for Partial Redundancy Elimination based on SSA Form., , , , , and . PLDI, page 273-286. ACM, (1997)Register allocation by priority-based coloring., and . SIGPLAN Symposium on Compiler Construction, page 222-232. ACM, (1984)