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Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology.

Z. Wei, Y. Leduc, E. de Foucauld, and G. Jacquemod. NEWCAS, page 121-124. IEEE, (2017)

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Emeric Fontaine

Emeric Baldisser

Emeric Guéguen

Foucauld Chamming's

Emeric Tourniaire

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Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology.G. Jacquemod, L. Geynet, B. Nicolle, E. de Foucauld, W. Tatinian, and P. Vincent. Microelectron. J., 39 (9): 1130-1139 (2008)A power optimized transconductance amplifier and its application to a 6th order lowpass GmC filter.F. Po, E. de Foucauld, D. Morche, P. Vincent, R. Molin, P. Pons, R. Pierquin, and E. Kerherve. ICECS, page 631-634. IEEE, (2009)Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology.Z. Wei, Y. Leduc, E. de Foucauld, and G. Jacquemod. NEWCAS, page 121-124. IEEE, (2017)A 433-MHz SOI CMOS Automatic Impedance Matching Circuit.E. de Foucauld, R. Severino, D. Nicolas, A. Giry, and C. Delaveaud. IEEE Trans. Circuits Syst. II Express Briefs, 66-II (6): 958-962 (2019)A frequency measurement BIST implementation targeting gigahertz application.M. Dubois, E. de Foucauld, C. Mounet, S. Dia, and C. Mayor. ITC, page 1-8. IEEE Computer Society, (2012)New design of analog and mixed-signal cells using back-gate cross-coupled structure.G. Jacquemod, Z. Wei, Y. Leduc, E. de Foucauld, J. Prouvée, and B. Blampey. VLSI-SoC, page 21-26. IEEE, (2019)UTBB-FDSOI complementary logic for high quality analog signal processing.Z. Wei, Y. Leduc, G. Jacquemod, and E. de Foucauld. ICECS, page 572-575. IEEE, (2016)Robust BER estimator for DBPSK modulation.T. Bonnoit, D. Morche, C. Dehos, and E. de Foucauld. NEWCAS, page 153-156. IEEE, (2014)Design of a RF matching network based on a new tunable inductor concept.M. Bakkali, F. Po, E. de Foucauld, B. Viala, and J. Michel. Microelectron. J., 42 (1): 233-238 (2011)An Ultra Low Power SoC for 2.4GHz IEEE802.15.4 wireless communications.C. Bernier, F. Hameau, G. Billiot, E. de Foucauld, S. Robinet, D. Lattard, J. Durupt, F. Dehmas, L. Ouvry, and P. Vincent. ESSCIRC, page 426-429. IEEE, (2008)

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Disambiguation of "de Foucauld, Emeric"

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Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology.

Please choose a person to relate this publication to

Emeric Fontaine

Emeric Baldisser

Emeric Guéguen

Foucauld Chamming's

Emeric Tourniaire

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "de Foucauld, Emeric"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology.

Please choose a person to relate this publication to

Emeric Fontaine

Emeric Baldisser

Emeric Guéguen

Foucauld Chamming's

Emeric Tourniaire

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology.