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A portable digital DLL for high-speed CMOS interface circuits., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 34 (5): 632-644 (1999)A 660 MB/s interface megacell portable circuit in 0.3 μm-0.7 μm CMOS ASIC., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 31 (12): 1995-2003 (1996)A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration., , , , , , , , , and 1 other author(s). ISSCC, page 132-134. IEEE, (2012)A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 48 (3): 636-648 (2013)A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs., , , , , , , and . IEEE J. Solid State Circuits, 38 (5): 747-754 (2003)An Experiment to Convert Structured Product Labels into Computable Prescribing Information., , , , , , , and . ICHI, page 296-300. IEEE, (2021)The design and implementation of PowerMill., , , and . ISLPD, page 105-110. ACM, (1995)