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Disambiguation of "Yuan, Min-Shueh"

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A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS.

, , , , , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)

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Min-Yuan Ma

Xiugan Yuan

Jing Yuan

Lei Yuan

Li Yuan

 

Other publications of authors with the same name

A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS., , , , , , , , , and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 68 (5): 1881-1891 (2021)19.6 A 0.2V trifilar-coil DCO with DC-DC converter in 16nm FinFET CMOS with 188dB FOM, 1.3kHz resolution, and frequency pushing of 38MHz/V for energy harvesting applications., , , , , , , and . ISSCC, page 332-333. IEEE, (2017)All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and ≤0.45-V Supply., , , , , and . IEEE J. Solid State Circuits, 53 (12): 3660-3671 (2018)14.5 A 1.22ps integrated-jitter 0.25-to-4GHz fractional-N ADPLL in 16nm FinFET CM0S., , , , , and . ISSCC, page 1-3. IEEE, (2015)A 0.1-3GHz cell-based fractional-N all digital phase-locked loop using ΔΣ noise-shaped phase detector., , , , , and . CICC, page 1-4. IEEE, (2013)A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS., , , , , , , , , and 3 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A 0.45V sub-mW all-digital PLL in 16nm FinFET for bluetooth low-energy (BLE) modulation and instantaneous channel hopping using 32.768kHz reference., , , , , and . ISSCC, page 448-450. IEEE, (2018)PLL Circuits., and . The VLSI Handbook, CRC Press, (1999)A 0.2-V Three-Winding Transformer-Based DCO in 16-nm FinFET CMOS., , , , , and . IEEE Trans. Circuits Syst., 67-II (12): 2878-2882 (2020)