Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS.

C. Li, T. Tsai, M. Yuan, C. Liao, C. Chang, T. Huang, H. Liao, C. Lu, H. Kuo, K. Hsieh, M. Chen, A. Ximenes, and R. Staszewski. VLSI Circuits, page 1-2. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Chien-Chung Huang

Jung-Chien Huang

Chieh Chien

Rey-Djin Chien

Pei-Lin Tien

Other publications of authors with the same name

A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS.C. Li, T. Tsai, M. Yuan, C. Liao, C. Chang, T. Huang, H. Liao, C. Lu, H. Kuo, K. Hsieh and 3 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application.M. Lin, C. Tsai, C. Chang, W. Huang, Y. Hsu, S. Yang, C. Fu, M. Chou, T. Huang, C. Chen and 5 other author(s). IEEE J. Solid State Circuits, 49 (4): 1063-1074 (2014)A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS.C. Li, M. Yuan, C. Liao, C. Chang, Y. Lin, T. Tsai, T. Huang, H. Liao, C. Lu, H. Kuo and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 68 (5): 1881-1891 (2021)

BibSonomy

Disambiguation of "Huang, Tien-Chien"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS.

Please choose a person to relate this publication to

Chien-Chung Huang

Jung-Chien Huang

Chieh Chien

Rey-Djin Chien

Pei-Lin Tien

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Huang, Tien-Chien"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS.

Please choose a person to relate this publication to

Chien-Chung Huang

Jung-Chien Huang

Chieh Chien

Rey-Djin Chien

Pei-Lin Tien

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS.