%0 Conference Paper %1 conf/vlsit/RicciSBRBLLSB23 %A Ricci, Luca %A Scaletti, Lorenzo %A Bè, Gabriele %A Rocco, Michele %A Bertulessi, Luca %A Levantino, Salvatore %A Lacaita, Andrea L. %A Samori, Carlo %A Bonfanti, Andrea %B VLSI Technology and Circuits %D 2023 %I IEEE %K dblp %P 1-2 %T A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#RicciSBRBLLSB23 %@ 978-4-86348-806-9

@inproceedings{conf/vlsit/RicciSBRBLLSB23, added-at = {2024-05-07T00:00:00.000+0200}, author = {Ricci, Luca and Scaletti, Lorenzo and Bè, Gabriele and Rocco, Michele and Bertulessi, Luca and Levantino, Salvatore and Lacaita, Andrea L. and Samori, Carlo and Bonfanti, Andrea}, biburl = {https://www.bibsonomy.org/bibtex/238f2ae7557bb15c907226d845af488bc/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2023}, ee = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185370}, interhash = {e95bc8b5381d19bef4d441d8aacece45}, intrahash = {38f2ae7557bb15c907226d845af488bc}, isbn = {978-4-86348-806-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-05-13T08:57:29.000+0200}, title = {A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#RicciSBRBLLSB23}, year = 2023 }