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A Secure Integrity Checking System for Nanoelectronic Resistive RAM., , , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (2): 416-429 (2019)Robust Chaos With Novel 4-Transistor Maps., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 914-918 (марта 2023)Design for Eliminating Operation Specific Power Signatures from Digital Logic., , , , и . ACM Great Lakes Symposium on VLSI, стр. 111-116. ACM, (2019)Design of a Weighted Average Chaotic System for Robust Chaotic Operation., , , и . MWSCAS, стр. 954-957. IEEE, (2021)Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range., , , , , и . ICECS, стр. 1-5. IEEE, (2021)On the Theoretical Analysis of Memristor based True Random Number Generator., , и . ACM Great Lakes Symposium on VLSI, стр. 21-26. ACM, (2019)A Soft-Matter Biomolecular Memristor Synapse for Neuromorphic Systems., , , , , , , и . BioCAS, стр. 1-4. IEEE, (2018)Stochasticity in Neuromorphic Computing: Evaluating Randomness for Improved Performance., , , , и . ICECS, стр. 454-457. IEEE, (2019)Design of a Lightweight Reconfigurable PRNG Using Three Transistor Chaotic Map., , , и . MWSCAS, стр. 586-589. IEEE, (2019)Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS., , , , и . MWSCAS, стр. 1016-1019. IEEE, (2018)