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Design Considerations for Insulator Metal Transition based Artificial Neurons.

, , , and . MWSCAS, page 1131-1134. IEEE, (2019)

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Robust Chaos With Novel 4-Transistor Maps., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 914-918 (March 2023)A Secure Integrity Checking System for Nanoelectronic Resistive RAM., , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (2): 416-429 (2019)Design for Eliminating Operation Specific Power Signatures from Digital Logic., , , , and . ACM Great Lakes Symposium on VLSI, page 111-116. ACM, (2019)Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS., , , , and . MWSCAS, page 1016-1019. IEEE, (2018)Modeling of Silicon Photomultiplier Based on Perimeter Gated Single Photon Avalanche Diode., , and . MWSCAS, page 1110-1113. IEEE, (2019)Design Considerations for Insulator Metal Transition based Artificial Neurons., , , and . MWSCAS, page 1131-1134. IEEE, (2019)Design of a Weighted Average Chaotic System for Robust Chaotic Operation., , , and . MWSCAS, page 954-957. IEEE, (2021)Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range., , , , , and . ICECS, page 1-5. IEEE, (2021)A Soft-Matter Biomolecular Memristor Synapse for Neuromorphic Systems., , , , , , , and . BioCAS, page 1-4. IEEE, (2018)Design of a Lightweight Reconfigurable PRNG Using Three Transistor Chaotic Map., , , and . MWSCAS, page 586-589. IEEE, (2019)