Author of the publication

Characterizing Power Distribution Attacks in Multi-User FPGA Environments.

, , and . FPL, page 194-201. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Incremental SAT-Based Reverse Engineering of Camouflaged Logic Circuits., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (10): 1647-1659 (2017)Power Distribution Attacks in Multitenant FPGAs., , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (12): 2685-2698 (2020)Characterizing Power Distribution Attacks in Multi-User FPGA Environments., , and . FPL, page 194-201. IEEE, (2019)Loop Unrolling for Energy Efficiency in Low-Cost Field-Programmable Gate Arrays., , , and . ACM Trans. Reconfigurable Technol. Syst., 11 (4): 26:1-26:23 (2019)Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs., , , , , and . FCCM, page 242-246. IEEE, (2021)Remote Power Side-Channel Attacks on CNN Accelerators in FPGAs., , , , and . CoRR, (2020)Reliable PUF design using failure patterns from time-controlled power gating., and . DFT, page 135-140. IEEE Computer Society, (2016)PUFs at a glance., and . DATE, page 1-6. European Design and Automation Association, (2014)Characterization of Long Wire Data Leakage in Deep Submicron FPGAs., , , , , and . FPGA, page 292-297. ACM, (2019)A Secure Design Methodology to Prevent Targeted Trojan Insertion during Fabrication., , and . ISVLSI, page 1-6. IEEE, (2023)