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Disambiguation of "Yu, Cunxi"

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Incremental SAT-Based Reverse Engineering of Camouflaged Logic Circuits.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (10): 1647-1659 (2017)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Yu-Ting Yu

Yu-Yu Su

Sze-Man Yu

Metal complexes with enolatoimine ligands for controlled olefin polymerizations. Uni Konstanz, (2009)

Hangxing Yu

Zhejun Yu

 

Other publications of authors with the same name

Performance Estimation of Synthesis Flows cross Technologies using LSTMs and Transfer Learning., and . CoRR, (2018)Invited Paper: Verilog-to-PyG - A Framework for Graph Learning and Augmentation on RTL Designs., , , and . ICCAD, page 1-4. IEEE, (2023)Accelerating Exact Combinatorial Optimization via RL-based Initialization - A Case Study in Scheduling., and . ICCAD, page 1-9. IEEE, (2023)LightRidge: An End-to-end Agile Design Framework for Diffractive Optical Neural Networks., , , , , and . ASPLOS (4), page 202-218. ACM, (2023)Formal Verification of Truncated Multipliers Using Algebraic Approach and Re-Synthesis., , , and . ISVLSI, page 415-420. IEEE Computer Society, (2017)End-to-End Industrial Study of Retiming., , , , , , , and . ISVLSI, page 203-208. IEEE Computer Society, (2018)Analyzing Imprecise Adders Using BDDs - A Case Study., and . ISVLSI, page 152-157. IEEE Computer Society, (2016)Reverse engineering of irreducible polynomials in GF(2m) arithmetic., , and . DATE, page 1558-1563. IEEE, (2017)Verification of gate-level arithmetic circuits by function extraction., , , , and . DAC, page 52:1-52:6. ACM, (2015)Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers., , , and . ISCAS, page 1-5. IEEE, (2018)