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Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression., , , , , , , , , и 2 other автор(ы). VLSI Design, стр. 381-386. IEEE Computer Society, (2009)Adaptive power gating for function units in a microprocessor., , , , , , , , и . ISQED, стр. 29-37. IEEE, (2010)Energy-efficient dynamic instruction scheduling logic through instruction grouping., , и . ISLPED, стр. 43-48. ACM, (2006)QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery., , , , и . HPCA, стр. 274-287. IEEE, (2022)Power reduction of chip multi-processors using shared resource control cooperating with DVFS., , , и . ICCD, стр. 615-622. IEEE, (2007)The Effectiveness of Low-Precision Floating Arithmetic on Numerical Codes: A Case Study on Power Consumption., , , , и . HPC Asia, стр. 199-206. ACM, (2020)Geyser., , , , , и . Handbook of Energy-Aware and Green Computing, Chapman and Hall/CRC, (2012)Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices., , , и . CoRR, (2024)Design and evaluation of fine-grained power-gating for embedded microprocessors., , , , , , , , , и 3 other автор(ы). DATE, стр. 1-6. European Design and Automation Association, (2014)Mitigating Process Variations with Cooperative Tuning for Performance and Power through a Simple DSL., , , , , и . CANDAR (Workshops), стр. 94-100. IEEE, (2021)