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Другие публикации лиц с тем же именем

Fast toggle rate computation for FPGA circuits., и . FPL, стр. 65-70. IEEE, (2008)Functionally linear decomposition and synthesis of logic circuits for FPGAs., и . DAC, стр. 18-23. ACM, (2008)Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits., и . DAC, стр. 324-329. IEEE, (2007)Silicon Verification using High-Level Design Tools (Abstract Only).. FPGA, стр. 272. ACM, (2015)LegUp: high-level synthesis for FPGA-based processor/accelerator systems., , , , , , , и . FPGA, стр. 33-36. ACM, (2011)Impact of FPGA architecture on resource sharing in high-level synthesis., , , , , , и . FPGA, стр. 111-114. ACM, (2012)Harnessing the power of FPGAs using altera's OpenCL compiler., , и . FPGA, стр. 5-6. ACM, (2013)From opencl to high-performance hardware on FPGAS., , , , , , , , и . FPL, стр. 531-534. IEEE, (2012)Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems., , , , , и . FCCM, стр. 17-24. IEEE Computer Society, (2012)High-Level Design Tools for Floating Point FPGAs., , и . FPGA, стр. 9-12. ACM, (2015)