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Другие публикации лиц с тем же именем

A Trojan-invalidating Circuit Based on Signal Transitions and Its FPGA Implementation., , и . ISCAS, стр. 1-5. IEEE, (2018)An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic Circuits., , , и . IOLTS, стр. 53-56. IEEE, (2018)A robust scan-based side-channel attack method against HMAC-SHA-256 circuits., , и . ICCE-Berlin, стр. 79-84. IEEE, (2017)An Incremental Placement and Global Routing Algorithm for Field-Programmable Gate Arrays., , , и . ASP-DAC, стр. 519-526. IEEE, (1998)Area/delay estimation for digital signal processor cores., , , , и . ASP-DAC, стр. 156-161. ACM, (2001)State dependent scan flip-flop with key-based configuration against scan-based side channel attack on RSA circuit., , , и . APCCAS, стр. 607-610. IEEE, (2012)A delay variation and floorplan aware high-level synthesis algorithm with body biasing., , , и . ISQED, стр. 75-80. IEEE, (2016)A process-variation-aware multi-scenario high-level synthesis algorithm for distributed-register architectures., , , и . SoCC, стр. 7-12. IEEE, (2015)A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration., , и . ISCAS, стр. 2129-2132. IEEE, (2015)Scan-based attack against Trivium stream cipher independent of scan structure., , и . ASICON, стр. 1-4. IEEE, (2013)