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Disambiguation of "Shi, Youhua"

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FCSCAN: an efficient multiscan-based test compression technique for test cost reduction.

, , , , and . ASP-DAC, page 653-658. IEEE, (2006)

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Youhua Deng

Youhua Chen

Huili Shi

Lei Shi

Zhanjun Shi

 

Other publications of authors with the same name

A process-variation-aware multi-scenario high-level synthesis algorithm for distributed-register architectures., , , and . SoCC, page 7-12. IEEE, (2015)A delay variation and floorplan aware high-level synthesis algorithm with body biasing., , , and . ISQED, page 75-80. IEEE, (2016)State dependent scan flip-flop with key-based configuration against scan-based side channel attack on RSA circuit., , , and . APCCAS, page 607-610. IEEE, (2012)Power-Efficient Deep Convolutional Neural Network Design Through Zero-Gating PEs and Partial-Sum Reuse Centric Dataflow., , , and . IEEE Access, (2021)Faithfully Truncated Adder-Based Area-Power Efficient FIR Design with Predefined Output Accuracy., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 103-A (9): 1063-1070 (2020)Timing monitoring paths selection for wide voltage IC., , , , and . IEICE Electron. Express, 13 (8): 20160095 (2016)MH4 : multiple-supply-voltages aware high-level synthesis for high-integrated and high-frequency circuits for HDR architectures., , , and . IEICE Electron. Express, 9 (17): 1414-1422 (2012)Design for Secure Test - A Case Study on Pipelined Advanced Encryption Standard., , , and . ISCAS, page 149-152. IEEE, (2007)Extension and Performance/Accuracy Formulation for Optimal GeAr-Based Approximate Adder Designs., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (7): 1014-1024 (2018)An energy-efficient high-level synthesis algorithm incorporating interconnection delays and dynamic multiple supply voltages., , , , and . VLSI-DAT, page 1-4. IEEE, (2013)