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Thermal Simulation of Traction System for High-Speed Train Based on Heat Accumulation.

, , , , , and . J. Comput., 7 (4): 1034-1040 (2012)

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DTTR: Detecting Text with Transformers., , , , , and . ICASSP, page 1-5. IEEE, (2023)Defect Analysis and Parallel March Test Algorithm for 3D Hybrid CMOS-Memristor Memory., , , , , and . ATS, page 25-29. IEEE, (2018)Test Response Data Volume and Wire Length Reductions for Extended Compatibilities Scan Tree Construction., , and . DELTA, page 308-313. IEEE Computer Society, (2008)A Pseudo-Random Transform Decomposition Method for Improving the Coding Compression Ratio of Test Data., , , and . HPCC/SmartCity/DSS, page 1611-1618. IEEE, (2019)Test data compression using interval broadcast scan for embedded cores., , and . Microelectron. J., 42 (11): 1313-1319 (2011)Integrating Two Logics Into One Crossbar Array for Logic Gate Design., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (8): 2987-2991 (2021)Power-Constrained DFT Algorithms for Non-Scan BIST-able RTL Data Paths., , , , and . Asian Test Symposium, page 32-39. IEEE Computer Society, (2004)A Novel BIST Scheme Using Test Vectors Applied by Circuit-under-Test Itself., , and . ATS, page 75-80. IEEE Computer Society, (2008)DCScan: A Power-Aware Scan Testing Architecture., , , and . ATS, page 348-455. IEEE Computer Society, (2008)Test Data Compression Using Four-Coded and Sparse Storage for Testing Embedded Core., , and . ICA3PP (2), volume 6082 of Lecture Notes in Computer Science, page 434-443. Springer, (2010)