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Hierarchical and Recursive Floorplanning Algorithm for NoC-Bascd Scalable Multi-Die FPGAs., , , and . APCCAS, page 476-480. IEEE, (2022)Area Efficient Box Filter Acceleration by Parallelizing with Optimized Adder Tree., , and . ISVLSI, page 55-60. IEEE, (2019)Data Partition Optimization for High Energy Efficiency by Decoupling Local Dependence in Holographic Video Decoder., , , , , , , and . ICECS, page 1-4. IEEE, (2023)Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture., , , and . DAC, page 1-6. IEEE, (2023)RPS-KNN: An Ultra-Fast FPGA Accelerator of Range-Projection-Structure K-Nearest-Neighbor Search for LiDAR Odometry in Smart Vehicles., , , , , , , and . ISCAS, page 1-5. IEEE, (2023)An Energy-Efficient Stream-Based FPGA Implementation of Feature Extraction Algorithm for LiDAR Point Clouds With Effective Local-Search., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (1): 253-265 (January 2023)Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFS., , , and . ICECS, page 446-449. IEEE, (2019)TAIT: One-Shot Full-Integer Lightweight DNN Quantization via Tunable Activation Imbalance Transfer., , , , , and . DAC, page 1027-1032. IEEE, (2021)HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multidie FPGAs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (11): 4295-4308 (November 2023)CLIF: Cross-Layer Information Fusion for Stereo Matching and its Hardware Implementation., , , and . ISCAS, page 1-5. IEEE, (2021)