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Area Efficient Box Filter Acceleration by Parallelizing with Optimized Adder Tree.

, , and . ISVLSI, page 55-60. IEEE, (2019)

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Hierarchical and Recursive Floorplanning Algorithm for NoC-Bascd Scalable Multi-Die FPGAs., , , and . APCCAS, page 476-480. IEEE, (2022)Area Efficient Box Filter Acceleration by Parallelizing with Optimized Adder Tree., , and . ISVLSI, page 55-60. IEEE, (2019)Data Partition Optimization for High Energy Efficiency by Decoupling Local Dependence in Holographic Video Decoder., , , , , , , and . ICECS, page 1-4. IEEE, (2023)Theoretical and Empirical Analysis of the Learning Rate and Momentum Factor in Neural Network Modeling for Stock Prediction., , and . ISICA, volume 5370 of Lecture Notes in Computer Science, page 697-706. Springer, (2008)Empirical Analysis of Optimal Hidden Neurons in Neural Network Modeling for Stock Prediction., and . PACIIA (2), page 828-832. IEEE Computer Society, (2008)978-0-7695-3490-9.HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multidie FPGAs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (11): 4295-4308 (November 2023)CLIF: Cross-Layer Information Fusion for Stereo Matching and its Hardware Implementation., , , and . ISCAS, page 1-5. IEEE, (2021)Bitwidth-Optimized Energy-Efficient FFT Design via Scaling Information Propagation., , , , , , , and . DAC, page 613-618. IEEE, (2021)An Energy-Efficient Stream-Based FPGA Implementation of Feature Extraction Algorithm for LiDAR Point Clouds With Effective Local-Search., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (1): 253-265 (January 2023)Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFS., , , and . ICECS, page 446-449. IEEE, (2019)