Author of the publication

A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC.

, , , , , , , , and . ISVLSI, page 260-265. IEEE Computer Society, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

COMET: A Cross-Layer Optimized Optical Phase Change Main Memory Architecture., , , , and . CoRR, (2023)Modeling Silicon-Photonic Neural Networks under Uncertainties., , and . CoRR, (2020)Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors., , , , , , , and . IEEE Trans. Computers, 63 (6): 1446-1459 (2014)CHAMP: Coherent Hardware-Aware Magnitude Pruning of Integrated Photonic Neural Networks., , , and . OFC, page 1-3. IEEE, (2022)A NoC Traffic Suite Based on Real Applications., , , , , , , and . ISVLSI, page 66-71. IEEE Computer Society, (2011)Silicon Photonic 2.5D Interposer Networks for Overcoming Communication Bottlenecks in Scale-out Machine Learning Hardware Accelerators., , , and . VTS, page 1-4. IEEE, (2024)Modeling Silicon-Photonic Neural Networks under Uncertainties., , and . DATE, page 98-101. IEEE, (2021)HyCo: A Low-Latency Hybrid Control Plane for Optical Interconnection Networks., , , , and . RSP, page 50-56. IEEE, (2021)ReSiPI: A Reconfigurable Silicon-Photonic 2.5D Chiplet Network with PCMs for Energy-Efficient Interposer Communication., , and . ICCAD, page 24:1-24:9. ACM, (2022)Design Space Exploration for PCM-based Photonic Memory., , , and . ACM Great Lakes Symposium on VLSI, page 533-538. ACM, (2023)