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Disambiguation of "Huang, Ru"

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Switching dynamics and computing applications of memristors: An overview.

, , , , , , and . ASICON, page 144-147. IEEE, (2017)

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Ru-Jin Huang

Ru Zhang

Ru Xie

Tomasz Ru

Ru Hao

 

Other publications of authors with the same name

A 0.39-mm2 Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom CDC., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 59 (2): 435-448 (February 2024)Theory and verification of operator design methodology., , , , , and . Sci. China Inf. Sci., 55 (2): 480-490 (2012)PDNNet: PDN-Aware GNN-CNN Heterogeneous Network for Dynamic IR Drop Prediction., , , , , and . CoRR, (2024)Hot carrier degradation behavior in SOI dynamic-threshold-voltage nMOSFET's (n-DTMOSFET) measured by gated-diode configuration., , , , , and . Microelectron. Reliab., 43 (5): 707-711 (2003)S2D-CIM: A 22nm 128Kb Systolic Digital Compute-in-Memory Macro with Domino Data Path for Flexible Vector Operation and 2-D Weight Update in Edge AI Applications., , , , , , , , , and 1 other author(s). CICC, page 1-2. IEEE, (2024)Quartet: A 22nm 0.09mJ/lnference Digital Compute-in-Memory Versatile AI Accelerator with Heterogeneous Tensor Engines and Off-Chip-Less Dataflow., , , , , , , , , and . CICC, page 1-2. IEEE, (2024)An 8b 1GS/s SAR ADC with Metastability-Based Resolution/Speed Enhancement and Self-Tuning Delay Achieving 47.2dB SNDR at Nyquist Input., , , , , , , , , and 1 other author(s). CICC, page 1-2. IEEE, (2024)Memory System Designed for Multiply-Accumulate (MAC) Engine Based on Stochastic Computing., , , , , , , and . ICICDT, page 1-4. IEEE, (2019)RIMAC: An Array-Level ADC/DAC-Free ReRAM-Based in-Memory DNN Processor with Analog Cache and Computation., , , , and . ASP-DAC, page 228-233. ACM, (2023)An Energy-Efficient Computing-in-Memory Neuromorphic System with On-Chip Training., , , , and . BioCAS, page 1-4. IEEE, (2019)