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Logic BIST Architecture Using Staggered Launch-on-Shift for Testing Designs Containing Asynchronous Clock Domains.

, , , , , , , , , , , and . DFT, page 358-366. IEEE Computer Society, (2010)

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Energy Efficiency Evaluation for Iron and Steel High Energy Consumption Enterprise., , , , , , and . ISIA, volume 86 of Communications in Computer and Information Science, page 684-690. Springer, (2010)A hierarchical integration scheduling method for flexible job shop with green lot splitting., , , and . Eng. Appl. Artif. Intell., (2024)A Decision-making Method for Active Remanufacturing Time Based on Environmental and Economic Indicators., , , , and . Int. J. Online Eng., 12 (12): 32-37 (2016)A Timing Decision-making Method for Active Remanufacturing Considering Reliability and Environmental Impact., , and . CASE, page 522-527. IEEE, (2021)Data-driven method for predicting energy consumption of machine tool spindle acceleration., , , , , and . CASE, page 528-533. IEEE, (2021)An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes., and . ITC, page 824-833. IEEE Computer Society, (2002)Application of green-modified value stream mapping to integrate and implement lean and green practices: A case study., , and . Int. J. Comput. Integr. Manuf., 33 (7): 716-731 (2020)CSER: BISER-based concurrent soft-error resilience., , , , , and . VTS, page 153-158. IEEE Computer Society, (2010)On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs., , , , , , , , , and . DFT, page 143-151. IEEE Computer Society, (2008)A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores., and . Asian Test Symposium, page 278-283. IEEE Computer Society, (2003)