Author of the publication

A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor Memory.

, , , , and . ICECS, page 630-633. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Towards Synaptic Behavior of Nanoscale ReRAM Devices for Neuromorphic Computing Applications., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 16 (2): 23:1-23:18 (2020)A practical hafnium-oxide memristor model suitable for circuit design and simulation., , , , and . ISCAS, page 1-4. IEEE, (2017)Circuit Techniques for Online Learning of Memristive Synapses in CMOS-Memristor Neuromorphic Systems., , , and . ACM Great Lakes Symposium on VLSI, page 479-482. ACM, (2017)A Multi-Driver Write Scheme for Reliable and Energy Efficient 1S1R ReRAM Crossbar Arrays., and . ISQED, page 64-69. IEEE, (2019)A bi-memristor synapse with spike-timing-dependent plasticity for on-chip learning in memristive neuromorphic systems., , and . ISQED, page 69-74. IEEE, (2018)Device-aware Circuit Design for Robust Memristive Neuromorphic Systems with STDP-based Learning., , , and . ACM J. Emerg. Technol. Comput. Syst., 16 (3): 28:1-28:25 (2020)A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor Memory., , , , and . ICECS, page 630-633. IEEE, (2019)A Novel Scan-In Scheme for CMOS/ReRAM Programmable Logic Circuits., , and . ISCAS, page 1-5. IEEE, (2018)Design techniques for in-field memristor forming circuits., , , and . MWSCAS, page 1224-1227. IEEE, (2017)Design Considerations for Insulator Metal Transition based Artificial Neurons., , , and . MWSCAS, page 1131-1134. IEEE, (2019)