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Disambiguation of "Grasso, Alfio Dario"

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A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS.

, , , , , and . IEEE J. Solid State Circuits, 43 (6): 1403-1413 (2008)

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Alfio Borzi

Emanuele Grasso

Floriana Grasso

Alfio Marazzi

Alfio Pappalardo

 

Other publications of authors with the same name

A 0.3-V 8.5-μ a Bulk-Driven OTA., , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (9): 1444-1448 (September 2023)Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes., , and . IEEE Trans. Instrum. Meas., 64 (1): 271-277 (2015)A toolbox for the symbolic analysis and simulation of linear analog circuits., , and . SMACD, page 1-4. IEEE, (2017)Active load with cross-coupled bulk for high-gain high-CMRR nanometer CMOS differential stages., , and . I. J. Circuit Theory and Applications, 47 (10): 1700-1704 (2019)Single miller capacitor frequency compensation techniques: Theoretical comparison and critical review., , , and . Int. J. Circuit Theory Appl., 50 (5): 1462-1486 (2022)CMOS Miller OTA with Body-Biased Output Stage., , , , and . ECCTD, page 539-542. IEEE, (2007)A 0.63 pJ/bit Fully-Digital BPSK Demodulator for US-powered IMDs downlink in a 28-nm bulk CMOS technology., , and . PRIME, page 125-128. IEEE, (2022)A compensation scheme for three-stage OTAs with no Miller capacitors., and . NEWCAS, page 1-4. IEEE, (2023)Novel straightforward and effective extraction methodology for SiPM model parameters., and . ECCTD, page 1-4. IEEE, (2017)Advances in Reversed Nested Miller Compensation., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (7): 1459-1470 (2007)