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An optimized CLP-based technique for generating propagation sequences., , , и . EWDTS, стр. 25-29. IEEE Computer Society, (2008)Automatic synthesis of OSCI TLM-2.0 models into RTL bus-based IPs., , и . HLDVT, стр. 105-112. IEEE Computer Society, (2010)On the reuse of RTL assertions in SystemC TLM verification., , , , , , , , и . LATW, стр. 1-6. IEEE, (2014)Model checking on TLM-2.0 IPs through automatic TLM-to-RTL synthesis., , и . VLSI-SoC, стр. 61-66. IEEE, (2010)A cross-level verification methodology for digital IPs augmented with embedded timing monitors., , , , , , , и . DATE, стр. 1-6. European Design and Automation Association, (2014)On the Reuse of TLM Mutation Analysis at RTL., , , , , , , , и . J. Electron. Test., 28 (4): 435-448 (2012)Efficient implementation and abstraction of systemc data types for fast simulation., , , , и . FDL, стр. 1-7. IEEE, (2011)Reusing RTL Assertion Checkers for Verification of SystemC TLM Models., , , , , , , , и . J. Electron. Test., 31 (2): 167-180 (2015)Mutation analysis for SystemC designs at TLM., , , , , , , и . LATW, стр. 1-6. IEEE, (2011)A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection., , , , , , , , и . Sensors, 15 (7): 17076-17088 (2015)