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Disambiguation of "Leblebici, Yusuf"

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Design and feasibility of multi-Gb/s quasi-serial vertical interconnects based on TSVs for 3D ICs.

, , , and . VLSI-SoC, page 149-154. IEEE, (2010)

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Yusuf

Erhan Leblebici

Nigem Yusuf

Faisal Yusuf

Sherif Yusuf

 

Other publications of authors with the same name

Reconfigurable forward homography estimation system for real-time applications., and . VLSI-SoC, page 1-6. IEEE, (2014)Ultra-low power mixed-signal design platform using subthreshold source-coupled circuits., and . DATE, page 711-716. IEEE Computer Society, (2010)Integration of intra chip stack fluidic cooling using thin-layer solder bonding., , , , , , and . 3DIC, page 1-8. IEEE, (2013)Using 3D integration technology to realize multi-context FPGAs., , , , , , and . FPL, page 507-510. IEEE, (2009)3.6 GHz CMOS ring oscillator with low tune voltage sensitivity and temperature compensation., , and . NORCAS, page 1-4. IEEE, (2015)Thermal aware design and comparative analysis of a high performance 64-bit adder in FD-SOI and bulk CMOS technologies., and . Integr., (2017)Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (11): 2053-2067 (2008)An Insect Eye Inspired Miniaturized Multi-Camera System for Endoscopic Imaging., and . IEEE Trans. Biomed. Circuits Syst., 11 (1): 212-224 (2017)Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic., and . Circuits, Signals, and Systems, page 483-487. IASTED/ACTA Press, (2004)FIR filters for hardware-based real-time multi-band image blending., and . Real-Time Image and Video Processing, volume 9400 of SPIE Proceedings, page 94000D. SPIE, (2015)