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Disambiguation of "Kimura, Shunji"

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A 25-Gb/s 480-mW CMOS modulator driver using area-efficient 3D inductor peaking.

, , , , , and . A-SSCC, page 1-4. IEEE, (2015)

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T Kimura

Shuji Kimura

Naoji Kimura

Ikuo Kimura

Sachiko Kimura

 

Other publications of authors with the same name

Hardware accelerator for coordinated radioresource scheduling in 5G ultra-high-density distributed antenna systems., , and . ITNAC, page 1-6. IEEE Computer Society, (2017)Direct-coupled distributed baseband amplifier IC's for 40-Gb/s optical communication., , and . IEEE J. Solid State Circuits, 31 (10): 1374-1379 (1996)A 10.3125Gb/s Burst-Mode CDR Circuit using a δσ DAC., , , , , and . ISSCC, page 226-227. IEEE, (2008)Wavelength router for energy efficient photonic aggregation with large-scale λ-tunable WDM/TDM-PON., , , and . APCC, page 350-354. IEEE, (2012)First system demonstration of hitless λ-tuning sequence for dynamic wavelength allocation in WDM/TDM-PON., , , , , , , , and . OFC, page 1-3. IEEE, (2014)Agile OLT-protection method based on backup wavelength and discovery process for resilient WDM/TDM-PON., , , , and . ECOC, page 1-3. IEEE, (2014)High output power OLT/ONU transceivers for 40 Gbit/s symmetric-rate NG-PON2 systems., , , , , and . ECOC, page 1-3. IEEE, (2015)Throughput Enhancement with Hardware Accelerated Resource Scheduler in Low-Latency 5G Systems., , , and . PIMRC, page 1-6. IEEE, (2018)40-km reach symmetric 40-Gbit/s λ-tunable WDM/TDM-PON using synchronized gain-clamping SOA., , , , , , , , , and . OFC/NFOEC, page 1-3. IEEE, (2013)Burst-off-level power reduction in λ-tunable transmitter using a reverse bias voltage controlled burst-mode booster SOA for 256-split WDM/TDM-PON., , , , and . OFC, page 1-3. IEEE, (2015)