( en | de | ru )

 

Disambiguation of "Aikyo, Takashi"

Author of the publication

copydeleteadd this publication to your clipboard
Test Challenge for Deep Sub-micron Era - Test & Diagnosis Platform: STARCAD-Clouseau.

. DFT, page 227. IEEE Computer Society, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Takashi Seki

Takashi Iwata

Takashi Numaguchi

Takashi Tsuno

Takashi Ohtsuki

 

Other publications of authors with the same name

Test Roles in Diagnosis and Silicon Debug., , , , , , and . ATS, page 367. IEEE, (2007)ATREX : Design for Testability System for Mega Gate LSIs., , , , , and . Asian Test Symposium, page 126-. IEEE Computer Society, (1997)A Study of Capture-Safe Test Generation Flow for At-Speed Testing., , , , , , , , , and 1 other author(s). IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (7): 1309-1318 (2010)Test Challenge for Deep Sub-micron Era - Test & Diagnosis Platform: STARCAD-Clouseau.. DFT, page 227. IEEE Computer Society, (2010)Small Delay Fault Model for Intra-Gate Resistive Open Defects., , , , , , and . VTS, page 27-32. IEEE Computer Society, (2009)At-Speed Testing with Timing Exceptions and Constraints-Case Studies., , , , , , , , , and . ATS, page 153-162. IEEE, (2006)An Automatic Test Generation System for Large Scale Gate Arrays., , , , and . COMPCON, page 445-451. IEEE Computer Society, (1986)Post-BIST Fault Diagnosis for Multiple Faults., , , , , , and . IEICE Trans. Inf. Syst., 91-D (3): 771-775 (2008)ASIC CAD system based on hierarchical design-for-testability., , , and . ITC, page 404-409. IEEE Computer Society, (1990)A Capture-Safe Test Generation Scheme for At-Speed Scan Testing., , , , , , , , , and 1 other author(s). ETS, page 55-60. IEEE Computer Society, (2008)