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Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor.

, , , , , , , , , , and . IBM J. Res. Dev., 41 (4&5): 489-504 (1997)

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Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis., , , , and . Asian Test Symposium, page 125-. IEEE Computer Society, (2000)Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor., , , , , , , , , and 1 other author(s). IBM J. Res. Dev., 41 (4&5): 489-504 (1997)Minimizing inductive noise in system-on-a-chip with multiple power gating structures., , , , , and . ESSCIRC, page 635-638. IEEE, (2003)Understanding and minimizing ground bounce during mode transition of power gating structures., , and . ISLPED, page 22-25. ACM, (2003)A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (7): 586-590 (2007)The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA)., , , , , , , , , and . ITC, page 883-891. IEEE Computer Society, (1999)Experimental measurement of a novel power gating structure with intermediate power saving mode., , , and . ISLPED, page 20-25. ACM, (2004)Diagnosis and characterization of timing-related defects by time-dependent light emission., , , , , , , , , and 1 other author(s). ITC, page 733-739. IEEE Computer Society, (1998)Diagnostic techniques for the IBM S/390 600 MHz G5 microprocessor., , , , , , and . ITC, page 1073-1082. IEEE Computer Society, (1999)