( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Phase-based alignment of two signals having partially overlapped spectra.

, , , , , и . ICASSP, стр. 3337-3340. IEEE, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Katsuhiko Kondo

 

Другие публикации лиц с тем же именем

Application of a continuous-time level crossing quantization method for timing noise measurements., , , , , , , и . ITC, стр. 1-10. IEEE Computer Society, (2011)High-Level Design of Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language., , , , и . ISMVL, стр. 112-117. IEEE Computer Society, (2008)Phase-based alignment of two signals having partially overlapped spectra., , , , , и . ICASSP, стр. 3337-3340. IEEE, (2009)A Single-Electron-Transistor Logic Gate Family and Its Application - Part II: Design and Simulation of a 7-3 Parallel Counter with Linear Summation and Multiple-Valued Latch Functions., , , , и . ISMVL, стр. 269-274. IEEE Computer Society, (2004)A new method for measuring alias-free aperture jitter in an ADC output., , , , , и . ITC, стр. 1-6. IEEE, (2015)A Field-Programmable Digital Filter Chip Using Multiple-Valued Current-Mode Logic., , и . ISMVL, стр. 213-220. IEEE Computer Society, (2003)Algorithm-Level Optimization of Multiple-Valued Arithmetic Circuits Using Counter Tree Diagrams., , , и . ISMVL, стр. 31. IEEE Computer Society, (2007)Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams., , , и . J. Multiple Valued Log. Soft Comput., 13 (4-6): 487-502 (2007)A Two-Bit-per-Cell Content-Addressable Memory Using Single-Electron Transistors., , , , и . ISMVL, стр. 32-38. IEEE Computer Society, (2005)An equivalent-time and clocked approach for continuous-time quantization., , , , , , , и . ISCAS, стр. 2529-2532. IEEE, (2011)