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The Minimax Cache: An Energy-Efficient Framework for Media Processors.

, , , and . HPCA, page 131-140. IEEE Computer Society, (2002)

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Improving the energy efficiency of hardware-assisted watchpoint systems., , , , and . DAC, page 54:1-54:6. ACM, (2013)Hardware Transactional Memory with Operating System Support, HTMOS., , , and . Euro-Par Workshops, volume 4854 of Lecture Notes in Computer Science, page 8-17. Springer, (2007)The limits of software transactional memory (STM): dissecting Haskell STM applications on a many-core environment., , , , , , and . Conf. Computing Frontiers, page 67-78. ACM, (2008)PaRV: Parallelizing Runtime Detection and Prevention of Concurrency Errors., , , , and . RV, volume 7687 of Lecture Notes in Computer Science, page 42-47. Springer, (2012)VPPET: Virtual platform power and energy estimation tool for heterogeneous MPSoC based FPGA platforms., , , , and . PATMOS, page 1-8. IEEE, (2014)Novel SRAM bias control circuits for a low power L1 data cache., , , , and . NORCHIP, page 1-6. IEEE, (2012)Approximating a Multi-Grid Solver., , , and . PMBS@SC, page 97-107. IEEE, (2018)System-level power estimation tool for embedded processor based platforms., , , , , and . RAPIDO, page 5:1-5:8. ACM, (2014)RMS-TM: a comprehensive benchmark suite for transactional memory systems (abstracts only)., , , , , and . SIGMETRICS Perform. Evaluation Rev., 39 (3): 19 (2011)Hardware transactional memory with software-defined conflicts., , , , , , , and . ACM Trans. Archit. Code Optim., 8 (4): 31:1-31:20 (2012)