Author of the publication

Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators.

, , , , , , and . ISQED, page 60-66. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimising Operator Sets for Analytical Database Processing on FPGAs., , , , , and . ARC, volume 12083 of Lecture Notes in Computer Science, page 30-44. Springer, (2020)Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators., , , , , , and . CoRR, (2020)Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware., , , , , , and . DAC, page 1-6. IEEE, (2023)Technology-aware Router Architectures for On-Chip-Networks in Heterogeneous Technologies., , and . NANOCOM, page 17:1-17:7. ACM, (2021)Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs., , , and . NORCAS, page 1-4. IEEE, (2015)Design method for asymmetric 3D interconnect architectures with high level models., , , , , and . ReCoSoC, page 1-8. IEEE, (2017)Hardware-accelerated pose estimation for embedded systems using Vivado HLS., , , , and . ReConFig, page 1-7. IEEE, (2016)Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS., , , , , and . ReConFig, page 1-8. IEEE, (2017)parti-gem5: gem5's Timing Mode Parallelised., , , , and . SAMOS, volume 14385 of Lecture Notes in Computer Science, page 177-192. Springer, (2023)NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool., , , and . VLSI-SoC, page 1-6. IEEE, (2022)