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Determining Mechanical Stress Testing Parameters for FHE Designs with Low Computational Overhead.

, , , , and . IEEE Des. Test, 37 (4): 35-41 (2020)

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Analytical modeling of NoCs for fast simulation and design exploration (invited)., , , and . SLIP, page 8. ACM, (2020)System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration., , , , , and . ASICON, page 1-4. IEEE, (2021)Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor., , , , , , , , , and 33 other author(s). ISCAS, page 443-447. IEEE, (2022)A Lightweight Congestion Control Technique for NoCs with Deflection Routing., , , , and . DATE, page 1-2. IEEE, (2023)Online Adaptive Learning for Runtime Resource Management of Heterogeneous SoCs., , , , , and . DAC, page 1-6. IEEE, (2020)Impact of On-Chip Interconnect on In-Memory Acceleration of Deep Neural Networks., , , , , and . CoRR, (2021)Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs., , , , , and . IEEE Des. Test, 37 (6): 79-87 (2020)Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks., , , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (2): 34:1-34:22 (2022)Achieving Datacenter-scale Performance through Chiplet-based Manycore Architectures., , , , and . DATE, page 1-6. IEEE, (2023)CANNON: Communication-Aware Sparse Neural Network Optimization., , , , and . IEEE Trans. Emerg. Top. Comput., 11 (4): 882-894 (October 2023)