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Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.

A. Okazaki, P. Narayanan, S. Ambrogio, K. Hosokawa, H. Tsai, A. Nomura, T. Yasuda, C. Mackin, A. Friz, M. Ishii, Y. Kohda, K. Spoon, A. Chen, A. Fasoli, M. Rasch, and G. Burr. ISCAS, page 3319-3323. IEEE, (2022)

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Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).H. Tsai, P. Narayanan, S. Jain, S. Ambrogio, K. Hosokawa, M. Ishii, C. Mackin, C. Chen, A. Okazaki, A. Nomura and 13 other author(s). ISCAS, page 1-5. IEEE, (2023)Pattern Training, Inference, and Regeneration Demonstration Using On-Chip Trainable Neuromorphic Chips for Spiking Restricted Boltzmann Machine.U. Shin, M. Ishii, A. Okazaki, M. Ito, M. Rasch, W. Kim, A. Nomura, W. Choi, D. Koh, K. Hosokawa and 3 other author(s). Adv. Intell. Syst., (2022)Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.A. Okazaki, P. Narayanan, S. Ambrogio, K. Hosokawa, H. Tsai, A. Nomura, T. Yasuda, C. Mackin, A. Friz, M. Ishii and 6 other author(s). ISCAS, page 3319-3323. IEEE, (2022)Optical Interconnect Opportunities for Future Server Memory Systems.Y. Katayama, and A. Okazaki. HPCA, page 46-50. IEEE Computer Society, (2007)Universal optical multi-drop bus for heterogeneous memory architecture.A. Okazaki, Y. Katayama, and S. Munetoh. Conf. Computing Frontiers, page 16. ACM, (2011)Analysis of Effect of Weight Variation on SNN Chip with PCM-Refresh Method.A. Nomura, M. Ito, A. Okazaki, M. Ishii, S. Kim, J. Okazawa, K. Hosokawa, and W. Haensch. Neural Process. Lett., 53 (3): 1741-1751 (2021)An analog-AI chip for energy-efficient speech recognition and transcription.S. Ambrogio, P. Narayanan, A. Okazaki, A. Fasoli, C. Mackin, K. Hosokawa, A. Nomura, T. Yasuda, A. Chen, A. Friz and 14 other author(s). Nat., 620 (7975): 768-775 (2023)NVM Weight Variation Impact on Analog Spiking Neural Network Chip.A. Nomura, M. Ito, A. Okazaki, M. Ishii, S. Kim, J. Okazawa, K. Hosokawa, and W. Haensch. ICONIP (7), volume 11307 of Lecture Notes in Computer Science, page 676-685. Springer, (2018)Software-defined massive multicore networking via freespace optical interconnect.Y. Katayama, A. Okazaki, and N. Ohba. Conf. Computing Frontiers, page 27:1-27:9. ACM, (2013)Non-intrusive Scalable Memory Access Tracer.N. Ohba, S. Munetoh, A. Okazaki, and Y. Katayama. QEST, volume 8657 of Lecture Notes in Computer Science, page 245-248. Springer, (2014)

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Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.

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Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.