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Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).

H. Tsai, P. Narayanan, S. Jain, S. Ambrogio, K. Hosokawa, M. Ishii, C. Mackin, C. Chen, A. Okazaki, A. Nomura, I. Boybat, R. Muralidhar, M. Frank, T. Yasuda, A. Friz, Y. Kohda, A. Chen, A. Fasoli, M. Rasch, S. Wozniak, J. Luquin, V. Narayanan, and G. Burr. ISCAS, page 1-5. IEEE, (2023)

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Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).H. Tsai, P. Narayanan, S. Jain, S. Ambrogio, K. Hosokawa, M. Ishii, C. Mackin, C. Chen, A. Okazaki, A. Nomura and 13 other author(s). ISCAS, page 1-5. IEEE, (2023)Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.A. Okazaki, P. Narayanan, S. Ambrogio, K. Hosokawa, H. Tsai, A. Nomura, T. Yasuda, C. Mackin, A. Friz, M. Ishii and 6 other author(s). ISCAS, page 3319-3323. IEEE, (2022)NVM Weight Variation Impact on Analog Spiking Neural Network Chip.A. Nomura, M. Ito, A. Okazaki, M. Ishii, S. Kim, J. Okazawa, K. Hosokawa, and W. Haensch. ICONIP (7), volume 11307 of Lecture Notes in Computer Science, page 676-685. Springer, (2018)Optical Interconnect Opportunities for Future Server Memory Systems.Y. Katayama, and A. Okazaki. HPCA, page 46-50. IEEE Computer Society, (2007)Universal optical multi-drop bus for heterogeneous memory architecture.A. Okazaki, Y. Katayama, and S. Munetoh. Conf. Computing Frontiers, page 16. ACM, (2011)Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).G. Burr, P. Narayanan, S. Ambrogio, A. Okazaki, H. Tsai, K. Hosokawa, C. Mackin, A. Nomura, T. Yasuda, J. Demarest and 15 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Performance Analysis of Spiking RBM with Measurement-Based Phase Change Memory Model.M. Ishii, M. Ito, W. Kim, S. Kim, A. Nomura, A. Okazaki, J. Okazawa, K. Hosokawa, M. BrightSky, and W. Haensch. ICONIP (5), volume 1143 of Communications in Computer and Information Science, page 591-599. Springer, (2019)Training Large-Scale Spiking Neural Networks on Multi-core Neuromorphic System Using Backpropagation.M. Ito, M. Rasch, M. Ishii, A. Okazaki, S. Kim, J. Okazawa, A. Nomura, K. Hosokawa, and W. Haensch. ICONIP (3), volume 11955 of Lecture Notes in Computer Science, page 185-194. Springer, (2019)Non-intrusive Scalable Memory Access Tracer.N. Ohba, S. Munetoh, A. Okazaki, and Y. Katayama. QEST, volume 8657 of Lecture Notes in Computer Science, page 245-248. Springer, (2014)Software-defined massive multicore networking via freespace optical interconnect.Y. Katayama, A. Okazaki, and N. Ohba. Conf. Computing Frontiers, page 27:1-27:9. ACM, (2013)

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Disambiguation of "Okazaki, Atsuya"

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Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).

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Disambiguation of "Okazaki, Atsuya"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).

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Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).