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A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.

J. sun Seo, B. Brezzo, Y. Liu, B. Parker, S. Esser, R. Montoye, B. Rajendran, J. Tierno, L. Chang, D. Modha, and D. Friedman. CICC, page 1-4. IEEE, (2011)

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Chitra Rajendran

Vidyalakshmi Rajendran

Bipin Juthani

Lawrence Rajendran

Ranjithkumar Rajendran

Other publications of authors with the same name

Training Multilayer Spiking Neural Networks using NormAD based Spatio-Temporal Error Backpropagation.N. Anwani, and B. Rajendran. CoRR, (2018)Nanoscale electronic synapses using phase change devices.B. Jackson, B. Rajendran, G. Corrado, M. Breitwisch, G. Burr, R. Cheek, K. Gopalakrishnan, S. Raoux, C. Rettner, A. Padilla and 5 other author(s). JETC, 9 (2): 12:1-12:20 (2013)Stochastic learning in deep neural networks based on nanoscale PCMO device characteristics.A. Babu, S. Lashkare, U. Ganguly, and B. Rajendran. Neurocomputing, (2018)Low-Power Neuromorphic Hardware for Signal Processing Applications: A review of architectural and system-level design approaches.B. Rajendran, A. Sebastian, M. Schmuker, N. Srinivasa, and E. Eleftheriou. IEEE Signal Process. Mag., 36 (6): 97-110 (2019)Bayesian Inference Accelerator for Spiking Neural Networks.P. Katti, A. Nimbekar, C. Li, A. Acharyya, B. Al-Hashimi, and B. Rajendran. CoRR, (2024)A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.J. sun Seo, B. Brezzo, Y. Liu, B. Parker, S. Esser, R. Montoye, B. Rajendran, J. Tierno, L. Chang, D. Modha and 1 other author(s). CICC, page 1-4. IEEE, (2011)Mimicking the worm - An adaptive spiking neural circuit for contour tracking inspired by C. Elegans thermotaxis.A. Bora, A. Rao, and B. Rajendran. IJCNN, page 2079-2086. IEEE, (2014)Training Probabilistic Spiking Neural Networks with First-to-spike Decoding.A. Bagheri, O. Simeone, and B. Rajendran. CoRR, (2017)Acceleration of Convolutional Networks Using Nanoscale Memristive Devices.S. Kulkarni, A. Babu, and B. Rajendran. EANN, volume 893 of Communications in Computer and Information Science, page 240-251. Springer, (2018)Live Demonstration: Image Classification Using Bio-inspired Spiking Neural Networks.S. Kulkarni, J. Alexiades, and B. Rajendran. ISCAS, page 1-. IEEE, (2018)

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Disambiguation of "Rajendran, Bipin"

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A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.

Please choose a person to relate this publication to

Chitra Rajendran

Vidyalakshmi Rajendran

Bipin Juthani

Lawrence Rajendran

Ranjithkumar Rajendran

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Rajendran, Bipin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.

Please choose a person to relate this publication to

Chitra Rajendran

Vidyalakshmi Rajendran

Bipin Juthani

Lawrence Rajendran

Ranjithkumar Rajendran

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.