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Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits.

, , и . ISCAS, стр. 2628-2631. IEEE, (2014)

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Jitendranath Mohanty

Subhasis Mohanty

Sasank Sekhar Mohanty

Basant Kumar Thakur

Jyoti Ranjan Mohanty

 

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