Author of the publication

MARTHA: architecture for control and emulation of power electronics and smart grid systems.

, , , and . DATE, page 519-524. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Var-CNN and DynaFlow: Improved Attacks and Defenses for Website Fingerprinting., , , and . CoRR, (2018)Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks., , and . ITC, page 887-896. IEEE Computer Society, (1991)Proof of Space from Stacked Expanders., and . TCC (B1), volume 9985 of Lecture Notes in Computer Science, page 262-285. (2016)Challenges in code generation for embedded processors., , , , , , , and . Code Generation for Embedded Processors, page 48-64. Kluwer, (1994)Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures., , and . Des. Autom. Embed. Syst., 4 (1): 5-22 (1999)Verification of relations between synchronous machines., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (12): 1947-1959 (1993)Irredundant sequential machines via optimal logic synthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (1): 8-18 (1990)Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching., , , , and . IEEE Trans. Emerg. Top. Comput., 2 (1): 37-49 (2014)Speeding up Exponentiation using an Untrusted Computational Resource., , , , and . Des. Codes Cryptogr., 39 (2): 253-273 (2006)Effects of Memory Performance on Parallel Job Scheduling., , and . JSSPP, volume 2221 of Lecture Notes in Computer Science, page 116-132. Springer, (2001)