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Disambiguation of "Sha, Edwin Hsing-Mean"

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Realistic Task Parallelization of the H.264 Decoding Algorithm for Multiprocessors.

, , , , , , , , , and . HPCC/CSS/ICESS, page 871-874. IEEE, (2015)

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William Meany

Wenjung Hsing

Joseph Edwin

Chi-Wu Hsing

Sha Wang

 

Other publications of authors with the same name

Performance optimization of multiple memory architectures for DSP., , and . ISCAS (5), page 469-472. IEEE, (2002)An Integrated Framework of Design Optimization and Space Minimization for DSP applications., , and . ISCAS (5), page 601-604. IEEE, (2003)Partitioning and Retiming of Multi-Dimensional Systems., , and . ISCAS, page 227-230. IEEE, (1994)2011 ACM TODAES best paper award., and . ACM Trans. Design Autom. Electr. Syst., 16 (4): 36:1 (2011)Loop scheduling with timing and switching-activity minimization for VLIW DSP., , , , and . ACM Trans. Design Autom. Electr. Syst., 11 (1): 165-185 (2006)Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation., , , , , and . DAC, page 350-355. ACM, (2010)General loop fusion technique for nested loops considering timing and code size., , , and . CASES, page 190-201. ACM, (2004)Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors., , , , and . ACM Trans. Embed. Comput. Syst., 13 (4): 79:1-79:25 (2014)Application-Specific Wear Leveling for Extending Lifetime of Phase Change Memory in Embedded Systems., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (10): 1450-1462 (2014)Data Placement and Duplication for Embedded Multicore Systems With Scratch Pad Memory., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (6): 809-817 (2013)