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Disambiguation of "Mei, Linyan"

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Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation.

, , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (5): 2013-2024 (2022)

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Mei Wu

Yu Mei

Xiaodong Mei

Mei Minghui

Mei Buder

 

Other publications of authors with the same name

SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators., , , , and . AICAS, page 1-5. IEEE, (2023)PetaOps/W edge-AI $\mu$ Processors: Myth or reality?, , , , , , , , , and 18 other author(s). DATE, page 1-6. IEEE, (2023)LOMA: Fast Auto-Scheduling on DNN Accelerators through Loop-Order-based Memory Allocation., , and . AICAS, page 1-4. IEEE, (2021)TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge., , , , , and . VLSI Technology and Circuits, page 20-21. IEEE, (2022)Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (5): 2013-2024 (2022)Sub-Word Parallel Precision-Scalable MAC Engines for Efficient Embedded DNN Inference., , , , , , and . AICAS, page 6-10. IEEE, (2019)ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators., , , and . ICCD, page 391-398. IEEE, (2023)DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling., , , and . HPCA, page 570-583. IEEE, (2023)Processor Architecture Optimization for Spatially Dynamic Neural Networks., , , , and . VLSI-SoC, page 1-6. IEEE, (2021)TinyVers: A Tiny Versatile System-on-chip with State-Retentive eMRAM for ML Inference at the Extreme Edge., , , , , and . CoRR, (2023)