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Disambiguation of "Zhu, Junheng"

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19.8 A 0.0021mm2 1.82mW 2.2GHz PLL using time-based integral control in 65nm CMOS.

, , , , , and . ISSCC, page 338-340. IEEE, (2016)

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Junheng Cheng

Junjiang Zhu

Yiping Zhu

Zhu Dai

Yongming Zhu

 

Other publications of authors with the same name

A 3.2GHz 405fsrms jitter -237.2dB-FoMJIT ring-based fractional-N synthesizer using two-step quantization noise cancellation and piecewise-linear nonlinearity correction., , , , , and . CICC, page 1-2. IEEE, (2021)3.2 A 0.0088mm2 Resistor-Based Temperature Sensor Achieving 92fJ·K2 FoM in 65nm CMOS., , , , and . ISSCC, page 60-62. IEEE, (2020)A 45-75MHz 197-452µW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2017)3.5 A 34µW 32MHz RC Oscillator with ±530ppm Inaccuracy from -40°C to 85°C and 80ppm/V Supply Sensitivity Enabled by Pulse-Density Modulated Resistors., , , , and . ISSCC, page 66-68. IEEE, (2020)A 0.016 mm2 0.26- $\mu$ W/MHz 60-240-MHz Digital PLL With Delay-Modulating Clock Buffer in 65 nm CMOS., , and . IEEE J. Solid State Circuits, 54 (8): 2186-2194 (2019)Low-area and power-efficient on-chip clock reference generation. University of Illinois Urbana-Champaign, USA, (2019)29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS., , , , , , , and . ISSCC, page 492-493. IEEE, (2017)19.8 A 0.0021mm2 1.82mW 2.2GHz PLL using time-based integral control in 65nm CMOS., , , , , and . ISSCC, page 338-340. IEEE, (2016)