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Adaptive Logical Control of RF LNA Performances for Efficient Energy Consumption.

, , , , and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 43-68. Springer, (2010)

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On-chip Pseudorandom Testing for Linear and Nonlinear MEMS., , , and . VLSI-SoC, volume 240 of IFIP, page 245-266. Springer, (2005)CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization., , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 281-300. Springer, (2006)Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times., , , , , and . ITC, page 1-7. IEEE, (2015)Re-engineering hardware specifications by exploiting design semantics., and . EURO-DAC, page 336-341. IEEE Computer Society, (1994)New techniques for selecting test frequencies for linear analog circuits., , , , and . VLSI-SoC, page 90-95. IEEE, (2013)On the Integration of Design and Test for Chips Embedding MEMS., and . IEEE Des. Test Comput., 16 (4): 28-38 (1999)Special Session on RF/5G Test., , , , , , , , , and 6 other author(s). ETS, page 1-9. IEEE, (2022)An implementation of memory-based on-chip analogue test signal generation., , , and . ASP-DAC, page 663-668. ACM, (2003)Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes., , , , , , , , , and 7 other author(s). MWSCAS, page 1081-1084. IEEE, (2014)On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators., , , and . ATS, page 43-48. IEEE, (2022)