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Disambiguation of "Jain, Shailendra"

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An IA-32 processor with a wide voltage operating range in 32nm CMOS.

, , , , , , , , , , , , , , , , , , and . Hot Chips Symposium, page 1-37. IEEE, (2012)

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Shailendra Fuloria

Shailendra Singh

Gora Jain

Himalaya Jain

Arpit Jain

 

Other publications of authors with the same name

Advancements in Converter Topology and control Strategies for switched Reluctance motors: Recent Contributions., , and . Mechatron. Syst. Control., (2021)A Dedicated Microcontroller based Fuzzy Controlled Shunt Active Power Filter., , and . Intell. Autom. Soft Comput., 11 (1): 33-46 (2005)Unity power factor controller for neutral point clamped active front end converter with DC voltage balancing., , , and . ICIT, page 384-389. IEEE, (2016)Implementing Setup Optimization on the Shop Floor., , and . Operations Research, 44 (6): 843-851 (1996)Soft Computing Techniques for Static Series Voltage Regulator of Self Excited Induction Generator., , , and . J. Circuits Syst. Comput., 24 (2): 1550025:1-1550025:26 (2015)An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS., , , , , , , , , and 4 other author(s). ISSCC, page 98-589. IEEE, (2007)A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS., , , , , , , , and . IEEE J. Solid State Circuits, 46 (4): 757-766 (2011)Power electronic interface for vehicular electrification., , and . ISIE, page 1-6. IEEE, (2013)A Review of Some Recently Proposed Topologies for Multilevel DC-AC Conversion., and . Journal of Circuits, Systems, and Computers, 25 (12): 1650157:1-1650157:25 (2016)A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm., , , , , , and . VLSI Design, page 252-257. IEEE Computer Society, (2010)