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Disambiguation of "Ye, Yibin"

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Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.

, , , , , , , and . DAC, page 486-491. ACM, (2002)

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Yibin Deng

Yibin Li

Yibin Wang

Wei Ye

Min Ye

 

Other publications of authors with the same name

Learning Capabilities of ELM-Trained Time-Varying Neural Networks., , and . WIRN, volume 26 of Smart Innovation, Systems and Technologies, page 41-52. Springer, (2013)5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 37 (11): 1421-1432 (2002)Incremental-Based Extreme Learning Machine Algorithms for Time-Variant Neural Networks., , and . ICIC (1), volume 6215 of Lecture Notes in Computer Science, page 9-16. Springer, (2010)Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications., , , , and . DAC, page 430-435. ACM Press, (1999)A Graph-Based Synthesis Algorithm for AND/XOR Networks., and . DAC, page 107-112. ACM Press, (1997)Dynamic noise analysis in precharge-evaluate circuits., , , , and . DAC, page 243. ACM, (2000)ELM-based Algorithms for Nonstationary Volterra System Identification., , and . WIRN, volume 234 of Frontiers in Artificial Intelligence and Applications, page 77-84. IOS Press, (2011)A 4.2GHz 0.3mm2 256kb Dual-Vcc SRAM Building Block in 65nm CMOS., , , , , , , , , and 3 other author(s). ISSCC, page 2572-2581. IEEE, (2006)Quasi-static energy recovery logic and supply-clock generation circuits., , and . ISLPED, page 96-99. ACM, (1997)Design and optimization of dual-threshold circuits for low-voltage low-power applications., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 7 (1): 16-24 (1999)