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A Low-Noise Design Technique for High-Speed CMOS Optical Receivers.

, , , , , , and . IEEE J. Solid State Circuits, 49 (6): 1437-1447 (2014)

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Architectures and Circuit Techniques for Nanoscale RF CMOS (Forum)., , , , , and . ISSCC, page 654-655. IEEE, (2008)A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz., , , , and . ISSCC, page 282-284. IEEE, (2011)A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension., , , and . ISSCC, page 350-351. IEEE, (2013)A BiCMOS Tunable Shaper for Detectors of Elementary Particles., , , and . ISCAS, page 1077-1080. IEEE, (1993)Balanced CMOS LC-tank analog frequency dividers for quadrature LO generation., , and . CICC, page 575-578. IEEE, (2005)A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz., , , and . CICC, page 1-4. IEEE, (2012)70-90-GHz Self-Tuned Polyphase Filter for Wideband I/Q LO Generation in a 55-nm BiCMOS Transmitter., , , , and . ESSCIRC, page 155-158. IEEE, (2019)A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS., , , and . ISSCC, page 216-217. IEEE, (2008)Injection-Locked CMOS Frequency Doublers for μ -Wave and mm-Wave Applications., , , and . IEEE J. Solid State Circuits, 45 (8): 1565-1574 (2010)A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications., , , and . IEEE J. Solid State Circuits, 43 (8): 1755-1762 (2008)