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A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification., , , и . DAC, стр. 1-6. IEEE, (2020)A Power-Efficient Binary-Weight Spiking Neural Network Architecture for Real-Time Object Classification., , , , и . CoRR, (2020)Covering hard-to-detect defects by thermal quorum sensing., , и . ETS, стр. 1-2. IEEE, (2018)Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages., , , , , , и . 3DIC, стр. 1-6. IEEE, (2023)A Thermal Quorum Sensing Scheme for Enhancement of Integrated-Circuit Reliability and Lifetime., , и . VLSI-DAT, стр. 1-4. IEEE, (2022)Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages., , , , , и . VTS, стр. 1-6. IEEE, (2023)Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation., , , и . ATS, стр. 197-202. IEEE Computer Society, (2016)Cell-aware test generation time reduction by using switch-level ATPG., , и . ITC-Asia, стр. 27-32. IEEE, (2017)IEEE Std P3405: New Standard-under-Development for Chiplet Interconnect Test and Repair., , , и . VTS, стр. 1-11. IEEE, (2024)Generating Test Patterns for Chiplet Interconnects: Achieving Optimal Effectiveness and Efficiency., , и . ITC-Asia, стр. 1-6. IEEE, (2023)