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Disambiguation of "Chuang, Po-Yao"

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A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification.

, , , and . DAC, page 1-6. IEEE, (2020)

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Ching-yao Chuang

Yao-chuang Yen

Yao Yao

Weihaw Chuang

Chuang Liu

 

Other publications of authors with the same name

A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification., , , and . DAC, page 1-6. IEEE, (2020)A Power-Efficient Binary-Weight Spiking Neural Network Architecture for Real-Time Object Classification., , , , and . CoRR, (2020)Covering hard-to-detect defects by thermal quorum sensing., , and . ETS, page 1-2. IEEE, (2018)Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages., , , , , , and . 3DIC, page 1-6. IEEE, (2023)Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation., , , and . ATS, page 197-202. IEEE Computer Society, (2016)Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages., , , , , and . VTS, page 1-6. IEEE, (2023)A Thermal Quorum Sensing Scheme for Enhancement of Integrated-Circuit Reliability and Lifetime., , and . VLSI-DAT, page 1-4. IEEE, (2022)Test and Repair Improvements for UCIe., , , and . ETS, page 1-6. IEEE, (2024)IEEE Std P3405: New Standard-under-Development for Chiplet Interconnect Test and Repair., , , and . VTS, page 1-11. IEEE, (2024)Cell-aware test generation time reduction by using switch-level ATPG., , and . ITC-Asia, page 27-32. IEEE, (2017)