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Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.

, , , , , , , , , и . CICC, стр. 1-4. IEEE, (2017)

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Hajime Sakai

Daisuke Shibata

Tomohiro Shibata

Hajime Konno

Hajime Myoken

 

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Frequency Response Analysis of Latch Utilized in High-Speed Comparator., , , и . ICECS, стр. 1077-1080. IEEE, (2006)A LTE RX front-end with digitally programmable multi-band blocker cancellation in 28nm CMOS., , , и . CICC, стр. 1-4. IEEE, (2017)A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW., , , , , , , и . IEEE J. Solid State Circuits, 47 (12): 2888-2897 (2012)A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET., , , , , , , и . VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)Automated Design of Analog Circuits Using Cell-Based Structure ., , и . Evolvable Hardware, стр. 85-92. IEEE Computer Society, (2002)A 1-MHz-Bandwidth Continuous-Time Delta-Sigma ADC Achieving >90dB SFDR and >80dB Antialiasing Using Reference-Switched Resistive Feedback DACs., , , , , , , , , и 1 other автор(ы). CICC, стр. 1-2. IEEE, (2023)Advances in high-speed continuous-time delta-sigma modulators., , , , и . CICC, стр. 1-8. IEEE, (2014)Analog circuit synthesis by superimposing of sub-circuits., и . ISCAS (5), стр. 427-430. IEEE, (2001)Continuous-Time Pipelined Analog-to-Digital Converters: A Mini-Tutorial., и . IEEE Trans. Circuits Syst. II Express Briefs, 68 (3): 810-815 (2021)A DC-to-1GHz tunable RF ΔΣ ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mW., , , , , , , и . ISSCC, стр. 150-152. IEEE, (2012)