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Disambiguation of "Devadas, Srinivas"

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Sanctorum: A lightweight security monitor for secure enclaves.

, , , , , , , and . CoRR, (2018)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Vinay Devadas

Deepika Devadas

Srinivas Jagarlamudi

Srinivas Yarlanki

Girish Srinivas

 

Other publications of authors with the same name

FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control., , and . CHES, volume 6917 of Lecture Notes in Computer Science, page 17-32. Springer, (2011)Access-controlled resource discovery in pervasive networks., , , , and . Concurr. Pract. Exp., 16 (11): 1099-1120 (2004)Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching., , , , and . IEEE Trans. Emerg. Top. Comput., 2 (1): 37-49 (2014)Speeding up Exponentiation using an Untrusted Computational Resource., , , , and . Des. Codes Cryptogr., 39 (2): 253-273 (2006)A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation., , , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)Automatic Verification of Pipelined Microprocessors., and . DAC, page 603-608. ACM Press, (1994)Delay-fault test generation and synthesis for testability under a standard scan design methodology., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (8): 1217-1231 (1993)Logic verification algorithms and their parallel implementation., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 8 (2): 181-189 (1989)Verification of relations between synchronous machines., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (12): 1947-1959 (1993)Irredundant sequential machines via optimal logic synthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (1): 8-18 (1990)