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Disambiguation of "Khan, Omer"

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Efficient parallelization of path planning workload on single-chip shared-memory multicores.

, , and . HPEC, page 1-6. IEEE, (2015)

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Emin Sinan Ömeroglu

Lutful Mannan Osama Omer

Abrehet Mohammed Omer

Lutful Mannan Osama Omer

Osman Hussein Omer

 

Other publications of authors with the same name

In-Hardware Moving Compute to Data Model to Accelerate Thread Synchronization on Large Multicores., , , and . IEEE Micro, 40 (1): 83-92 (2020)POSTER: Exploiting Multi-Level Task Dependencies to Prune Redundant Work in Relax-Ordered Task-Parallel Algorithms., , , and . PACT, page 495-496. IEEE, (2019)A framework to accelerate sequential programs on homogeneous multicores., , , and . VLSI-SoC, page 344-347. IEEE, (2013)CoDG-ReRAM: An Algorithm-Hardware Co-design to Accelerate Semi-Structured GNNs on ReRAM., , , , , , , , , and 1 other author(s). ICCD, page 280-289. IEEE, (2022)Characterization of mitigation schemes against timing-based side-channel attacks on PCIe hardware., , and . ISQED, page 1-6. IEEE, (2022)Seeds of SEED: Characterizing Enclave-level Parallelism in Secure Multicore Processors., and . SEED, page 203-209. IEEE, (2021)ConNOC: A Practical Timing Channel Attack on Network-on-chip Hardware in a Multicore Processor., and . HOST, page 192-202. IEEE, (2021)Timing-based side-channel attack and mitigation on PCIe connected distributed embedded systems., , and . HPEC, page 1-7. IEEE, (2021)Time-Predictable Computer Architecture for Cyber-Physical Systems: Digital Emulation of Power Electronics Systems., , , , , and . RTSS, page 305-316. IEEE Computer Society, (2011)A model to exploit power-performance efficiency in superscalar processors via structure resizing., and . ACM Great Lakes Symposium on VLSI, page 215-220. ACM, (2010)