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Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulators.

, , , , , , , and . DAC, page 1:1-1:6. ACM, (2017)

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Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance., and . ACM Trans. Comput. Syst., 18 (2): 89-126 (2000)An event-guided approach to reducing voltage noise in processors., , , , and . DATE, page 160-165. IEEE, (2009)Wattch: a framework for architectural-level power analysis and optimizations., , and . ISCA, page 83-94. IEEE Computer Society, (2000)Profiling a warehouse-scale computer., , , , , , and . ISCA, page 158-169. ACM, (2015)Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance., and . HPCA, page 13-22. IEEE Computer Society, (1999)Design and test strategies for microarchitectural post-fabrication tuning., , , and . ICCD, page 84-90. IEEE Computer Society, (2009)Multi-accelerator system development with the ShrinkFit acceleration framework., , and . ICCD, page 75-82. IEEE Computer Society, (2014)Achieving uniform performance and maximizing throughput in the presence of heterogeneity., , , and . HPCA, page 3-14. IEEE Computer Society, (2011)A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators., , , , , , , , , and . VLSI Circuits, page 34-. IEEE, (2019)A multi-chip system optimized for insect-scale flapping-wing robots., , , , , , , , and . VLSIC, page 152-. IEEE, (2015)